Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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07/09/1996
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Application #:
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08066709
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Filing Dt:
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05/24/1993
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Inventors:
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HIROAKI HIRATA, KOZO KIMURA
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Title:
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CACHE BLOCK REPLACEMENT SCHEME BASED ON DIRECTORY CONTROL BIT SET/RESET AND HIT/MISS BASIS IN A MULTITHREADING MULTIPROCESSOR ENVIRONMENT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1006, OAZA KADOMA, KADOMA-SHI |
OSAKA-FU, JAPAN |
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PRICE, GESS & UBELL |
JOSEPH W. PRICE, ESQ. |
2100 S.E. MAIN STREET, SUITE 250 |
IRVINE, CALIFORNIA 92714 |
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