Patent Assignment Abstract of Title
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Total Assignments:
4
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Patent #:
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Issue Dt:
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09/10/1996
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Application #:
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08306438
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Filing Dt:
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09/19/1994
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Inventors:
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TOSHIAKI KIRIHATA, DAISUKE KATO
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Title:
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METHOD AND APPARATUS FOR REDUNDANCY WORD LINE REPLACEMENT IN A SEMICONDUCTOR MEMORY DEVICE
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Assignment:
1
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CORRECTIVE ASSIGNMENT TO CORRECT ASSIGNEE'S ADDRESS, PREVIOUSLY RECORDED ON REEL 7241, FRAMES 481-483.
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| 9775 TOLEDO WAY |
| IRVINE,, CALIFORNIA 92718 |
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| BANNER & ALLEGRETTI, LTD. |
| JOSEPH M. POTENZA |
| 1001 G STREET, N.W., ELEVENTH FLOOR |
| WASHINGTON, D.C. 20001-4597 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| BANNER, BIRCH, MCKIE & BECKETT |
| JOSEPH M. POTENZA |
| 1001 G ST., NW |
| 11TH FLOOR |
| WASHINGTON, DC 20001-4597 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1300 I STREET, N.W. |
| FRANKLIN SQUARE BUILDING |
| WASHINGTON, DISTRICT OF COLUMBIA 20005-3315 |
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| BANNER, BIRCH, MCKIE & BECKETT |
| JOSEPH M. POTENZA |
| 1001 G ST., NW |
| 11TH FLOOR |
| WASHINGTON, DC 20001-4597 |
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Assignment:
4
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 72 HORIKAWA-CHO, SAIWAI-KU |
| KAWASAKI-SHI, JAPAN |
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| BANNER & ALLEGRETTI, LTD. |
| JOSEPH M. POTENZA |
| 1001 G STREET, N.W., ELEVENTH FLOOR |
| WASHINGTON, D.C. 20004-4597 |
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