Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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10/01/1996
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Application #:
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08309142
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Filing Dt:
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09/20/1994
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Inventors:
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HIDEAKI WATANABE, KENJI YAMADA
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Title:
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ARITHMETIC LOGIC UNIT PROVIDED WITH COMBINATIONAL CIRCUIT AND ZERO VALUE DETECTOR CONNECTED IN PARALLEL
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1015, KAMIKODANAKA, NAKAHARA-KU |
| KAWASAKI-SHI, KANAGAWA, 211, JAPAN |
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| 1844-2, KOZOJI-CHO 2-CHOME |
| KASUGAI-SHI, AICHI, 487, JAPAN |
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| NIKAIDO, MARMELSTEIN, MURRAY & ORAM |
| CHARLES M. MARMELSTEIN |
| METROPOLITAN SQUARE, G STREET LOBBY |
| 655 15TH ST., N.W., SUITE 330 |
| WASHINGTON, DC 20005-5701 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-1, NISHI-SHINJUKU 2-CHOME |
| SHINJUKU-KU, TOKYO, JAPAN 163-0722 |
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| ARENT FOX LLP |
| 1050 CONNECTICUT AVENUE, N.W. |
| SUITE 400 |
| WASHINGTON, DC 20036-5339 |
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Assignment:
3
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CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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| 2-10-23 SHIN-YOKOHAMA, KOHOKU-KU |
| YOKOHAMA-SHI, KANAGAWA 222-0033, JAPAN |
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| ARENT FOX LLP |
| 1050 CONNECTICUT AVENUE, N.W. |
| SUITE 400 |
| WASHINGTON, D.C. 20036-5339 |
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