Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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03/11/1997
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Application #:
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08494384
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Filing Dt:
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06/26/1995
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Inventors:
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KYOJI YAMASHITA, SHINJI ODANAKA, KAZUMI KURIMOTO, HIROYUKI UMIMOTO
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Title:
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SEMICONDUCTOR DEVICE HAVING REDUCED GATE OVERLAPPING CAPACITANCE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1006, OHAZA KADOMA, KADOMA-SHI |
| OSAKA, JAPAN 571 |
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| NEIL A. DUCHEZ |
| 1621 EUCLID AVENUE - 19TH FL. |
| CLEVELAND, OH 44115 |
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Assignment:
2
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CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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| 1006 OAZA KADOMA, KADOMA-SHI |
| OSAKA, JAPAN 571-8501 |
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| PANASONIC PATENT CENTER |
| 1130 CONNECTICUT AVE., N.W., SUITE 1100 |
| WASHINGTON, DC 20036 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| ONE MARKET PLAZA, STEUART TOWER, SUITE 800 |
| SAN FRANCISCO, CALIFORNIA 94105 |
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| GREGORY M. HOWISON |
| P.O. BOX 741715 |
| DALLAS, TX 75374-1715 |
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