Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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09/09/1997
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Application #:
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08650486
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Filing Dt:
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05/17/1996
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Inventors:
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YOSHIRO NAKATA, SHINICHI OKI, KOICHI NAGAO, KENZO HATADA, SHIGEOKI MORI, TAKASHI SATO et al
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Title:
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SEMICONDUCTOR DEVICE CHECKING METHOD
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1006, OAZA KADOMA, KADOMA-SHI |
| OSAKA 571, JAPAN |
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| 3-6 AKASAKA 5-CHOME, MINATO-KU |
| TOKYO, JAPAN 107 |
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| MCDERMOT, WILL & EMERY |
| EDWARD E. KUBASIEWICZ, ESQ. |
| 1850 K STREET, N.W. |
| SUITE 450 |
| WASHINGTON, D.C. 20006-2296 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1006, OAZA-KADOMA, KADOMA-SHI |
| OSAKA, JAPAN |
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| DAVID J. CUSHING - SUGHRUE MION PLLC |
| 2100 PENNSYLVANIA AVENUE, N.W. |
| SUITE 800 |
| WASHINGTON, D.C, DC 20037 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 10-23, SHINYOKOHAMA 2-CHOME, KOHOKU-KU, YOKOHAMA-SHI |
| KANAGAWA, JAPAN 2220033 |
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| PANASONIC CORPORATION |
| 2-1-61, SHIROMI, CHUO-KU |
| 7F OBP PANASONIC TOWER |
| OSAKA, 540-6207 JAPAN |
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