Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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10/14/1997
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Application #:
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08423378
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Filing Dt:
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04/18/1995
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Inventors:
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YOJI NISHIO, KOSAKU HIROSE, HIDEO HARA, KATSUNORI KOIKE, KAYOKO NEMOTO, TATSUMI YAMAUCHI et al
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Title:
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GATE CIRCUIT AND SEMICONDUCTOR CIRCUIT TO PROCESS LOW AMPLITUDE SIGNALS, MEMORY, PROCESSOR AND INFORMATION PROCESSING SYSTEM MANUFACTURED BY USE OF THEM
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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6, KANDA SURUGADAI 4-CHOME CHIYODA-KU |
TOKYO 100, JAPAN |
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2-1, SAIWAI-CHO 3-CHOME, HITACHI-SHI |
IBARAKI 317, JAPAN |
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ANTONELLI, TERRY, STOUT & KRAUS |
GREGORY E. MONTONE |
1300 N. SEVENTEENTH STREET, SUITE 1800 |
ARLINGTON, VIRGINIA 22209 |
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