Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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03/31/1998
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Application #:
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08755550
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Filing Dt:
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11/22/1996
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Inventors:
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KAZUTO FURUMOCHI, JUNJI SEINO
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Title:
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MOS STATIC RAM WITH IMPROVED SOFT ERROR RESISTANCE; HIGH-LEVEL SUPPLY VOLTAGE DROP DETECTION CIRCUIT AND COMPLEMENTARY SIGNAL TRANSITION DETECTION CIRCUIT FOR THE SAME; AND SEMICONDUCTOR DEVICE WITH IMPROVED INTERSIGNAL TIME MARGIN
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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7-1, NISHI-SHINJUKU 2-CHOME, SHINJUKU-KU |
TOKYO, JAPAN 163-0722 |
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KRATZ, QUINTOS & HANSON, LLP |
1420 K STREET, N.W. |
SUITE 400 |
WASHINGTON, DC 20005 |
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