Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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07/07/1998
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Application #:
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08497699
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Filing Dt:
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06/30/1995
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Inventor:
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S. V. VENKATESH
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Title:
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METHOD FOR HIERARCHICAL TIME DRIVE CIRCUIT LAYOUT BY REBUDGETING TIMING CONSTRAINTS OF PLURALITY OF LOGICAL BLOCKS AFTER PLACEMENT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 555 RIVER OAKS PARKWAY |
| SAN JOSE, CALIFORNIA 95134 |
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| STEPHEN Y.F. PANG |
| TOWNSEND AND TOWNSEND AND CREW |
| TWENTIENTH FLOOR, STEUART STREET TOWER |
| ONE MARKET PLAZA |
| SAN FRANCISCO, CALIFORNIA 94105-1492 |
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