Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08730677
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Filing Dt:
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10/11/1996
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Inventors:
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TEIICHIRO NISHIZAKA, KAZUYUKI YAMASAKI
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Title:
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SEMICONDUCTOR MEMORY DEVICE HAVING BIT LINES WIDELY SPACED WITHOUT SACRIFICE OF NARROW PITCH OF SOURCE/DRAIN LINES OF MEMORY CELLS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-1, SHIBA 5-CHOME, MINATO-KU |
| TOKYO, JAPAN |
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| HELFGOTT & KARAS, P.C. |
| SAMSON HELFGOTT |
| EMPIRE STATE BUILDING, 60TH FLOOR |
| NEW YORK, NEW YORK 10118 |
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Assignment:
2
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CORRECTIVE ASSIGNMENT TO CORRECT THE INVENTORS NAME, PREVIOUSLY RECORDED ON REEL 8323 FRAME 0205.
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| 7-1, SHIBA 5-CHOME, MINATO-KU |
| TOKYO, JAPAN |
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| HELFGOTT & KARAS, P.C. |
| SAMSON HELFGOTT |
| EMPIRE STATE BUILDING, 60TH FLOOR |
| 350 5TH AVENUE |
| NEW YORK, NY 10118 |
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