Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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10/13/1998
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Application #:
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08618137
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Filing Dt:
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03/19/1996
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Inventor:
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JUNJI HIROOKA
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Title:
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DMA CONTROLLER WITH PREFETCH CACHE RECHECKING IN RESPONSE TO MEMORY FETCH DECISION UNIT'S INSTRUCTION WHEN ADDRESS COMPARING UNIT DETERMINES INPUT ADDRESS AND PREFETCH ADDRESS COINCIDE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, KAMIKODANAKA 4-CHOME NAKAHARA-KU, KAWASAKA-SHI |
| KANAGAWA 211, JAPAN |
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| STAAS & HALSEY |
| H.J. STAAS |
| 700 ELEVENTH STREET, N.W. |
| SUITE 500 |
| WASHINGTON, D.C. 20001 |
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