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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
5844850
Issue Dt:
12/01/1998
Application #:
08619396
Filing Dt:
03/21/1996
Inventors:
TOSHIKAZU TSUTSUI, TOHRU KOYAMA, FUMIHITO OHTA, YASUKAZU MUKOGAWA, MASAAKI FURUTA et al
Title:
APPARATUS FOR ANALYZING A FAILURE IN A SEMICONDUCTOR WAFER AND METHOD THEREOF
Assignment: 1
Reel/Frame:
008081/0782Recorded: 05/10/1996Pages: 7
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
TSUTSUI, TOSHIKAZU
Exec Dt:
02/15/1996
KOYAMA, TOHRU
Exec Dt:
02/15/1996
OHTA, FUMIHITO
Exec Dt:
02/15/1996
MUKOGAWA, YASUKAZU
Exec Dt:
02/15/1996
FURUTA, MASAAKI
Exec Dt:
02/15/1996
MASHIKO, YOHIJ
Exec Dt:
02/15/1996
Assignees:
MITSUBISHI DENKI KABUSHIKI KAISHA
2-3, MARUNOUCHI 2-CHOME, CHIYODA-KU
TOKYO 100, JAPAN
RYODEN SEMICONDUCTOR SYSTEM ENGINEERING CORPORATION
1 MIZUHARA 4-CHOME, ITAMI-SHI
HYOGO 664, JAPAN
Correspondent:
LOWE, PRICE, LEBLANC & BECKER
STEPHEN A. BECKER
99 CANAL CENTER PLAZA
SUITE 300
ALEXANDRIA, VA 22314
Assignment: 2
Reel/Frame:
025980/0219Recorded: 03/18/2011Pages: 67
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
MITSUBISHI DENKI KABUSHIKI KAISHA
Exec Dt:
03/07/2011
Assignee:
RENESAS ELECTRONICS CORPORATION
1753, SHIMONUMABE, NAKAHARA-KU, KAWASAKI-SHI,
KANAGAWA, JAPAN 211-8668
Correspondent:
MCDERMOTT WILL & EMERY LLP
600 THIRTEENTH STREET, N.W.
WASHINGTON, DC 20005-3096

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