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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
5898636
Issue Dt:
04/27/1999
Application #:
08255240
Filing Dt:
06/07/1994
Inventors:
SATORU ISOMURA, ATSUSHI SHIMIZU, KEIICHI HIGETA, TOHRU KOBAYASHI, TAKEO YAMADA, YUKO ITO et al
Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE WITH INTERLEAVED MEMORY AND LOGIC BLOCKS
Assignment: 1
Reel/Frame:
007837/0823Recorded: 03/01/1996Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
ISOMURA, SATORU
Exec Dt:
06/30/1994
SHIMIZU, ATSUSHI
Exec Dt:
06/30/1994
HIGETA, KEIICHI
Exec Dt:
06/30/1994
KOBAYASHI, TOHRU
Exec Dt:
06/30/1994
YAMADA, TAKEO
Exec Dt:
06/30/1994
IT, YUKO
Exec Dt:
06/30/1994
MIYAZAWA, KENYO
Exec Dt:
06/30/1994
YAMAGUCHI, KUNIHIKO
Exec Dt:
06/30/1994
Assignee:
HITACHI, LTD.
CHIYODA-KU, TOKYO, JAPAN
Correspondent:
FAY, SHARPE, BEALL, FAGAN, ET AL.
THOMAS E. KOCOVSKY, JR.
1100 SUPERIOR AVENUE
SUITE 700
CLEVELAND, OH 44114-2518
Assignment: 2
Reel/Frame:
007973/0382Recorded: 06/17/1996Pages: 4
Conveyance:
RECORD TO CORRECT THE SPELLING OF THE SIXTH AND THE SEVENTH INVENTOR'S NAMES PREVIOUSLY RECORDED AT REEL 7837 FRAME 823.
Assignors:
ISOMURA, SATORU
Exec Dt:
06/30/1994
SHIMIZU, ATSUSHI
Exec Dt:
06/30/1994
HIGETA, KEIICHI
Exec Dt:
06/30/1994
KOBAYASHI, TOHRU
Exec Dt:
06/30/1994
YAMADA, TAKEO
Exec Dt:
06/30/1994
ITO, YUKO
Exec Dt:
06/30/1994
MIYAZAWA, KENGO
Exec Dt:
06/30/1994
YAMAGUCHI, KUNIHIKO
Exec Dt:
06/30/1994
Assignee:
HITACHI, LTD.
6, KANDA SURUGADAI 4-CHOME, CHIYODA-KU
TOKYO, JAPAN
Correspondent:
FAY, SHARPE, BEALL, FAGAN, ET AL
THOMAS E. KOCOVSKY, JR.
1100 SUPERIOR AVENUE
SUITE 700
CLEVELAND, OHIO 44114-2518

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