Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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07/06/1999
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Application #:
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08714269
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Filing Dt:
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09/17/1996
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Inventors:
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NOBUSUKE YAMAOKA, TAKASHI TAYA, AKIRA YOSHIDA, SHUICHI MATSUMOTO
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Title:
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BIT PHASE SYNCHRONIZING CIRCUITRY FOR CONTROLLING PHASE AND FREQUENCY, AND PLL CIRCUIT THEREFOR
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-12, TORANOMON 1-CHOME MINATO-KU |
| TOKYO, JAPAN |
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| LAW OFFICE OF STEVEN M. RABIN, P.C. |
| STEVEN M. RABIN, ESQ. |
| 1725 K STREET, N.W., SUITE 1111 |
| WASHINGTON, D.C. 20006 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2-1-16 KITA-UENO |
| MY BLDG., SUITE 701 |
| TAITO-KU, TOKYO, JAPAN 110-0014 |
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| MASUVALLEY & PARTNERS |
| 9635 GRANITE RIDGE DR. SUITE 100 |
| SAN DIEGO, CA 92123 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2953 BUNKER HILL LANE, SUITE 300 |
| SANTA CLARA, CALIFORNIA 95054 |
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| MASUVALLEY & PARTNERS |
| 9665 GRANITE RIDGE DR., SUITE 560 |
| SAN DIEGO, CA 92123 |
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