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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
07/13/1999
Application #:
08692346
Filing Dt:
08/05/1996
Inventor:
TAKESHI YAMAZAKI
Title:
MULTI-PROCESSOR SYSTEM AND METHOD FOR SYNCHRONIZING AMONG PROCESSORS WITH CACHE MEMORY HAVING RESET STATE, INVALID STATE, AND VALID STATE
Assignment: 1
Reel/Frame:
008193/0137Recorded: 09/26/1996Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
08/15/1996
Assignee:
7-1, SHIBA 5-CHOME, MINATO-KU
TOKYO, JAPAN
Correspondent:
WHITMAN, CURTIS, WHITMAN & MCGINN
SEAN M. MCGINN, ESQ.
1180 SUNRISE VALLEY DRIVE
RESTON INTERNATIONAL CENTER, STE. 900
RESTON, VA 20191

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