Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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03/21/2000
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Application #:
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09053966
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Filing Dt:
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04/02/1998
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Inventors:
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FUMIO NAKATSUJI, TOSHINORI MAEDA, HIROSHI KAMIYAMA
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Title:
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SYSTEM FOR OPERATING INPUT, PROCESSING, AND OUTPUT UNITS IN PARALLEL AND USING DMA CIRCUIT FOR SUCCESSIVELY TRANSFERRING DATA THROUGH THETH REE UNITS VIA AN INTERNAL MEMORY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1006, OAZA KADOMA, KADOMA-SHI |
| OSAKA-FU, JAPAN |
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| PRICE, GESS & UBELL |
| JOSEPH W. PRICE, ESQ. |
| 2100 S.E. MAIN ST., SUITE 250 |
| IRVINE, CA 92714 |
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