Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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07/18/2000
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Application #:
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08824871
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Filing Dt:
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03/26/1997
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Inventors:
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TAKATSUGU SASAKI, AKIRA KABEMOTO, HIROHIDE SUGAHARA, JUNJI NISHIOKA, YOZO NAKAYAMA et al
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Title:
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MULTIPROCESSOR, MEMORY ACCESSING METHOD FOR MULTIPROCESSOR, TRANSMITTER AND RECEIVER IN DATA TRANSFER SYSTEM, DATA TRANSFER SYSTEM, AND BUS CONTROL METHOD FOR DATA TRANSFER SYSTEM
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1-1, KAMIKODANAKA 4-CHOME, NAKAHARA-KU, KAWASAKI-SHI |
KANAGAWA 211, JAPAN |
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NU-98-2, AZA-UNOKE, UNOKE-MACHI, KAHOKU-GUN |
ISHIKAWA, 929-11, JAPAN |
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ARMSTRONG, WESTERMAN, HATTORI, MCLELAND |
& NAUGHTON |
MEL R. QUINTOS |
1725 K ST., NW - SUITE 1000 |
WASHINGTON, DC 20006 |
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