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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
10/10/2000
Application #:
08817934
Filing Dt:
07/11/1997
Inventor:
HAJIME TAKAMATSU
Title:
MULTIPROCESSOR SYSTEM HAVING A PLURALITY OF GATEWAY UNITS AND WHEREIN EACH GATEWAY UNIT CONTROLS MEMORY ACCESS REQUESTS AND INTERFERENCES FROM ONE HIERCHICAL LEVEL TO ANOTHER
Assignment: 1
Reel/Frame:
008828/0036Recorded: 07/11/1997Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
05/12/1997
Assignee:
1-2 MARUNOUCHI, 1-CHOME, CHIYODA-KU
TOKYO, JAPAN 100
Correspondent:
NIXON & VANDERHYE P.C.
ARTHUR R. CRAWFORD
1100 NORTH GLEBE ROAD
8TH FLOOR
ARLINGTON, VA 22201
Assignment: 2
Reel/Frame:
012418/0837Recorded: 01/03/2002Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
11/13/2001
Assignee:
1-1, KAMIKODANAKA 4-CHOME NAKAHARA-KU
KAWASAKI-SHI, KANAGAWA, JAPAN 211-8
Correspondent:
NIXON & VANDERHYE P.C.
LARRY S. NIXON
1100 NORTH GLEBE ROAD, 8TH FLOOR
ARLINGTON, VIRGINIA 22201

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