Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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10/10/2000
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Application #:
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08817934
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Filing Dt:
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07/11/1997
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Inventor:
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HAJIME TAKAMATSU
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Title:
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MULTIPROCESSOR SYSTEM HAVING A PLURALITY OF GATEWAY UNITS AND WHEREIN EACH GATEWAY UNIT CONTROLS MEMORY ACCESS REQUESTS AND INTERFERENCES FROM ONE HIERCHICAL LEVEL TO ANOTHER
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1-2 MARUNOUCHI, 1-CHOME, CHIYODA-KU |
TOKYO, JAPAN 100 |
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NIXON & VANDERHYE P.C. |
ARTHUR R. CRAWFORD |
1100 NORTH GLEBE ROAD |
8TH FLOOR |
ARLINGTON, VA 22201 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1-1, KAMIKODANAKA 4-CHOME NAKAHARA-KU |
KAWASAKI-SHI, KANAGAWA, JAPAN 211-8 |
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NIXON & VANDERHYE P.C. |
LARRY S. NIXON |
1100 NORTH GLEBE ROAD, 8TH FLOOR |
ARLINGTON, VIRGINIA 22201 |
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