Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09348584
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Filing Dt:
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07/07/1999
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Inventors:
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ATSUSHI IWATA, MAKOTO NAGATA, KATSUMASA HIJIKATA
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Title:
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LOW SWITCHING NOISE LOGIC CIRCUIT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 16-10, SHINBASHI 6-CHOME MINATO-KU |
| TOKYO 105-0004, JAPAN |
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| MCDERMOTT, WILL & EMERY |
| STEPHEN A. BECKER |
| 600 13TH STREET, N.W. |
| WASHINGTON, DC 20005 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 16-10, SHINBASHI 6-CHOME, MINATO-KU |
| TOKYO 105-0004, JAPAN |
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| MCDERMOTT, WILL & EMERY |
| STEPHEN A. BECKER |
| 600 13TH STREET, N.W. |
| WASHINGTON, DC 20005 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| CAMPUS BUILDING 209, 10-7 SAIJO-SHITAMI 5-CHOME, HIGASHI-HIROSHIMA-SHI |
| HIROSHIMA, JAPAN 739-0047 |
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| WASHINGTON IP DOCKET |
| 600 THIRTEENTH STREET, N.W. |
| WASHINGTON, DC 20005-3096 |
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