Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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11/07/2000
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Application #:
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09061178
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Filing Dt:
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04/17/1998
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Inventor:
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YUICHI SATO
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Title:
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MOS LOGIC CIRCUIT AND SEMICONDUCTOR APPARATUS INCLUDING THE SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 22-22, NAGAIKE-CHO, ABENO-KU |
| OSAKA 545-8522, JAPAN |
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| BIRCH STEWART KOLASCH & BIRCH, LLP |
| TERRELL C. BIRCH |
| P.O. BOX 747 |
| FALLS CHURCH, VA 22040-0747 |
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