Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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05/08/2001
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Application #:
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09140323
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Filing Dt:
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08/26/1998
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Inventors:
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YOSHIRO NAKATA, SHINICHI OKI
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Title:
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METHOD OF TESTING ELECTRICAL CHARACTERISTICS OF MULTIPLE SEMICONDUCTOR INTEGRATED CIRCUITS SIMULTANEOUSLY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1006, OAZA KADOMA, KADOMA-SHI, |
| OSAKA, JAPAN |
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| SIXBEY, FRIEDMAN, LEEDOM & FERGUSON |
| GERALD J. FERGERSON, JR. |
| 2010 CORPORATE RIDGE |
| SUITE 600 |
| MCLEAN, VIRGINIA 22102 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 10-23, SHINYOKOHAMA 2-CHOME, KOHOKU-KU, YOKOHAMA-SHI |
| KANAGAWA, JAPAN 2220033 |
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| PANASONIC CORPORATION |
| 2-1-61, SHIROMI, CHUO-KU |
| 7F OBP PANASONIC TOWER |
| OSAKA, 540-6207 JAPAN |
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