Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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08936472
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Filing Dt:
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09/18/1997
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Inventors:
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YASUSHI KUBOTA, KENICHI KATOH, JUN KOYAMA
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Title:
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TFT CMOS LOGIC CIRCUIT HAVING SOURCE/DRAIN ELECTRODES OF DIFFERING SPACING FROM THE GATE ELECTRODE FOR DECREASING WIRING CAPACITANCE AND POWER CONSUMPTION
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 398, HASE, ATSUGI-SHI |
| KANAGAWA-KEN 243-0036, JAPAN |
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| 22-22, NAGAIKE-CHO, ABENO-KU |
| OSAKA 545-0013, JAPAN |
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| FISH & RICHARDSON P.C. |
| SCOTT C. HARRIS |
| 4225 EXECUTIVE SQUARE, STE. 1400 |
| LA JOLTA, CA 92037 |
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