Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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09208202
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Filing Dt:
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12/09/1998
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Inventors:
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VASSILI KITCH, MICHAEL E. THOMAS
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Title:
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METHOD FOR DECREASING CONTACT RESISTANCE OF AN ELECTRODE POSITIONED INSIDE A MISALIGNED VIA FOR MULTILEVEL INTERCONNECTS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2900 SEMICONDUCTOR DRIVE, MAIL STOP D3-579 |
| SANTA CLARA, CALIFORNIA 95051 |
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| SKJERVEN, MORRILL, MACPHERSON, ET AL. |
| EDWARD C. KWOK |
| 25 METRO DRIVE, SUITE 700 |
| SAN JOSE, CA 95110 |
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