Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09439932
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Filing Dt:
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11/12/1999
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Inventors:
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SUN-CHIEH CHIEN, HAL LEE, JHY-JENG LIU, WEI-WU LIAO
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Title:
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SELF-ALIGNED SILICIDE PROCESS FOR FORMING SILICIDE LAYER OVER WORD LINES IN DRAM AND TRANSISTORS IN LOGIC CIRCUIT REGION
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| SCIENCE-BASED INDUSTRIAL PARK |
| NO. 3, LI-HSIN RD. II. |
| HSINCHU CITY, TAIWAN R.O.C |
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| THOMAS, KAYDEN, HORSTEMEYER & ET AL. |
| DANIEL R. MCCLURE |
| 100 GALLERIA PARKWAY, SUITE 1500 |
| ATLANTA, GEORGIA 30339 |
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