Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09688466
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Filing Dt:
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10/16/2000
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Inventor:
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Jenoe Tihanyi
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Title:
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Method for fabricating an soi wafer for low-impedance high-voltage semiconductor components
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| ZT GG VF POSTFACH 22 16 34 |
| MUNCHEN, GERMANY 80506 |
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| LERNER AND GREENBERG |
| RALPH E. LOCHER |
| P.O. BOX 2480 |
| HOLLYWOOD, FL 33022 |
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