Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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09/04/2001
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Application #:
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09583963
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Filing Dt:
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05/31/2000
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Inventors:
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Munir D. Naeem, Gangadhara S. Mathad, Byeong Yeol Kim, Rajiv M. Ranade et al
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Title:
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Method of reducing RIE lag for deep trench silicon etching
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NEW ORCHARD ROAD |
| ARMONK, NEW YORK 10504 |
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| INTERNATIONAL BUSINESS MACHINES CORP. |
| H. DANIEL SCHNURMANN |
| INTELLECTUAL PROPERTY LAW DEPARTMENT |
| DEPT. 18G/BLDG. 300-482 - 2070 ROUTE 52 |
| HOPEWELL JUNCTION, NY 12533 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1730 NORTH FIRST STREET |
| SAN JOSE, CALIFORNIA 95112 |
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| INTERNATIONAL BUSINESS MACHINES CORP. |
| H. DANIEL SCHNURMANN |
| DEPT. 18G/BLDG. 300-482 |
| 2070 ROUTE 52 |
| HOPEWELL JUNCTION, NY 12533 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| ST. MARTIN-STR. 53 |
| 81541 MUNICH, GERMANY |
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| SIEMENS CORPORATION |
| ELSA KELLER |
| 186 WOOD AVENUE SOUTH |
| INTELLECTUAL PROPERTY DEPARTMENT |
| ISELIN, NJ 08830 |
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