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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
6300177
Issue Dt:
10/09/2001
Application #:
09768488
Filing Dt:
01/25/2001
Inventors:
Ravi Sundaresan, Yang Pan, James Yong Meng Lee, Ying Keung Leung et al
Title:
Method to form transistors with multiple threshold voltages (VT) using a combination of different work function gate materials
Assignment: 1
Reel/Frame:
011499/0085Recorded: 01/25/2001Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
SUNDARESAN, RAVI
Exec Dt:
11/09/2000
PAN, YANG
Exec Dt:
11/09/2000
LEE, JAMES YONG MENG
Exec Dt:
11/09/2000
LEUNG, YING KEUNG
Exec Dt:
11/09/2000
PRADEEP, YELEHANKA RAMACHANDRAMURTHY
Exec Dt:
11/09/2000
ZHENG, JIA ZHEN
Exec Dt:
11/09/2000
CHAN, LAP
Exec Dt:
11/09/2000
QUEK, ELGIN
Exec Dt:
11/09/2000
Assignee:
CHARTERED SEMICONDUCTOR MANUFACTURING INC.
1450 MCCANDLESS DRIVE
MILPITAS, CALIFORNIA 95035
Correspondent:
GEORGE O. SAILE
20 MCINTOSH DRIVE
POUGHKEEPSIE, NY 12603
Assignment: 2
Reel/Frame:
013467/0710Recorded: 11/07/2002Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
CHARTERED SEMICONDUCTOR MANUFACTURING INC.
Exec Dt:
06/19/2002
Assignee:
CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
60 WOODLANDS INDUSTRIAL PARK D
STREET 2
SINGAPORE, SINGAPORE 738406
Correspondent:
GEORGE O. SAILE
28 DAVIS AVENUE
POUGHKEEPSIE, NY 12603

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