Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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10/09/2001
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Application #:
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09104921
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Filing Dt:
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06/25/1998
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Inventors:
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BRIAN CARDANHA, DAN STOTZ, KENT R. TOWNLEY
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Title:
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ON CHIP CMOS VLSI REFERENCE VOLTAGE WITH FEEDBACK FOR HYSTERESIS NOISE MARGIN
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| LEGAL DEPARTMENT, M/S 20BN |
| 3000 HANOVER STREET |
| PALO ALO, CALIFORNIA 94304 |
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| HEWLETT-PACKARD COMPANY |
| JEROME DECHANT |
| LEGAL DEPARTMENT, IP SECTION |
| 19111 PRUNERIDGE AVE., M/S 44L18 |
| CUPERTINO, CA 95014-0795 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| LEGAL DEPARTMENT, M/S 20BN |
| 3000 HANOVER STREET |
| PALO ALTO, CALIFORNIA 94304 |
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| HEWLETT-PACKARD COMPANY |
| JEROME DECHANT |
| LEGAL DEPARTMENT, IP SECTION |
| 19111 PRUNERIDGE AVE., M/S 44L18 |
| CUPERTINO, CA 95014-0795 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 416 MAETAN-DONG |
| YEONGTONG-GU, SUWON-SI |
| GYEONGGI-DO, KOREA, REPUBLIC OF |
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| ROBERT N. CROUSE |
| MYERS BIGEL SIBLEY & SAJOVEC |
| P.O. BOX 37428 |
| RALEIGH, NC 27627 |
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