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Patent Assignment Abstract of Title
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Total Assignments: 5
Patent #:
Issue Dt:
10/16/2001
Application #:
09602758
Filing Dt:
06/23/2000
Inventors:
Joerg Vollrath, Michael Fera, Philip Moore
Title:
Shielded bit line architecture for memory arrays
Assignment: 1
Reel/Frame:
010936/0624Recorded: 06/23/2000Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
06/22/2000
Exec Dt:
06/22/2000
Assignee:
6000 TECHNOLOGY BOULEVARD
SANSTON, VIRGINIA 23150
Correspondent:
SIEMENS CORPORATION
ELSA KELLER
INTELLECTUAL PROPERTY DEPARTMENT
186 WOOD AVENUE SOUTH
ISELIN, NJ 08830
Assignment: 2
Reel/Frame:
010936/0635Recorded: 06/23/2000Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
06/22/2000
Assignee:
1730 NORTH FIRST STREET
SAN JOSE, CALIFORNIA 95112
Correspondent:
SIEMENS CORPORATION
ELSA KELLER
INTELLECTUAL PROPERTY DEPARTMENT
186 WOOD AVENUE SOUTH
ISELIN, NJ 08830
Assignment: 3
Reel/Frame:
012061/0943Recorded: 08/08/2001Pages: 3
Conveyance:
CERTIFICATE OF AMENDMENT
Assignor:
Exec Dt:
01/01/2001
Assignee:
6000 TECHNOLOGY BLVD.
SANDSTRON, VIRGINIA 23150
Correspondent:
SIEMENS CORPORATION
ELSA KELLER
INTELLECTUAL PROPERTY DEPARTMENT
186 WOOD AVENUE SOUTH
ISELIN, NJ 08830
Assignment: 4
Reel/Frame:
023814/0001Recorded: 01/14/2010Pages: 385
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
04/25/2006
Exec Dt:
04/25/2006
Assignee:
GUSTAV-HEINEMANN-RING 212
MUNICH, GERMANY 81739
Correspondent:
BARRY E. BRETSCHNEIDER
C/O MORRISON AND FOERSTER LLP
1650 TYSONS BLVD. SUITE 400
MCLEAN, VA 22102
Assignment: 5
Reel/Frame:
027763/0881Recorded: 02/10/2012Pages: 19
Conveyance:
SECURITY AGREEMENT
Assignor:
Exec Dt:
01/30/2012
Assignee:
390 GREENWICH STREET
NEW YORK, NEW YORK 10013
Correspondent:
JAMES MURRAY
CT LIEN SOLUTIONS
4400 EASTON COMMONS WAY, SUITE 125
COLUMBUS, OH 43219

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