Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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02/05/2002
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Application #:
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09694039
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Filing Dt:
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10/23/2000
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Inventors:
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Kengo Aritomi, Takayuki Miyamoto
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Title:
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Semiconductor integrated circuit device that can suppress generation of signal skew between data input/output terminals
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| CHIYODA-KU |
| 2-3, MARUNOUCHI 2-CHOME |
| TOKYO 100-8310, JAPAN |
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| MCDERMOTT, WILL & EMERY |
| STEPHEN A. BECKER |
| 600 13TH STREET, NW |
| WASHINGTON, DC 20005 |
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Assignment:
2
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CORRECTIVE ASSIGNMENT TO CORRECT THE FIRST ASSIGNOR'S LAST NAME, PREVIOUSLY RECORDED AT REEL 011280 FRAME 0895.
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| 2-3, MARUNOUCHI 2-CHOME |
| CHIYODA-KU, TOKYO 100-8310, JAPAN |
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| MCDERMOTT, WILL & EMERY |
| STEPHEN A. BECKER |
| 600 13TH STREET, N.W. |
| WASHINGTON, DC 20005 |
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