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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
05/21/2002
Application #:
09417662
Filing Dt:
10/14/1999
Inventors:
HIDEKI IWAKI, YUTAKA TAGUCHI, TETSUYOSHI OGURA
Title:
MULTI-LEVEL CIRCUIT SUBSTRATE, METHOD FOR MANUFACTURING SAME AND METHOD FOR ADJUSTING A CHARACTERISTIC IMPEDANCE THEREFOR
Assignment: 1
Reel/Frame:
010329/0099Recorded: 10/14/1999Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
10/01/1999
Exec Dt:
10/01/1999
Exec Dt:
10/01/1999
Assignee:
1006, OAZA KADOMA
OSAKA 571-8501, JAPAN
Correspondent:
THEIEN REID & PRIEST LLP
701 PA. AVE. NW.
STE. 800
WASH DC. 20004

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