Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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05/28/2002
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Application #:
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09333122
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Filing Dt:
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06/14/1999
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Inventor:
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DAVID J. GURNEY
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Title:
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ADAPTIVE INTEGRATED CIRCUIT DESIGN SIMULATION TRANSISTOR MODELING AND EVALUATION
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 8005 S.W. BOECKMAN ROAD |
| WILSONVILLE, OREGON 97070 |
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| BLAKELY SOKOLOFF TAYLOR & ZAFMAN, LLP |
| ALOYSIUS T.C. AUYEUNG |
| 12400 WILSHIRE BLVD., 7TH FLOOR |
| LOS ANGELES, CALIFORNIA 90025 |
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