Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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07/02/2002
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Application #:
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09757066
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Filing Dt:
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01/08/2001
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Publication #:
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Pub Dt:
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05/10/2001
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Inventor:
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James C. Chen
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Title:
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SYSTEM, IC CHIP, ON-CHIP TEST STRUCTURE, AND CORRESPONDING METHOD FOR MODELING ONE OR MORE TARGET INTERCONNECT CAPACITANCES
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Assignment:
1
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MERGER (SEE DOCUMENT FOR DETAILS).
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| 1982A ZANKER ROAD |
| SAN JOSE, CALIFORNIA 95112 |
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| FLEHR HOHBACH TEST |
| ALDO J. TEST |
| FOUR EMBARCADERO CENTER |
| SUITE 3400 |
| SAN FRANCISCO, CA 94111-4187 |
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Assignment:
2
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CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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| 1982A ZANKER ROAD |
| SAN JOSE, CALIFORNIA 95112 |
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| FLEHR HOHBACH TEST ALBRITTON & HERBERT |
| ALDO J. TEST |
| SUITE 3400 |
| FOUR EMBARCADERO CENTER |
| SAN FRANCISCO CA 94111-4187 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2655 SEELY AVE. |
| SAN JOSE, CALIFORNIA 95134 |
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| CADENCE DESIGN SYSTEMS, INC. |
| 2655 SEELY AVE |
| SAN JOSE, CA 95134 |
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