Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09725725
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Filing Dt:
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11/30/2000
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Publication #:
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Pub Dt:
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06/14/2001
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Inventors:
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Tadayuki Taura, Shigeru Atsumi
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Title:
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VOLTAGE-LEVEL SHIFTER AND SEMICONDUCTOR MEMORY USING THE SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 72, HORIKAWA-CHO, SAIWAI-KU |
| KAWASAKI-SHI, KANAGAWA-KEN, JAPAN |
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| BANNER & WITCOFF, LTD. |
| JOSEPH M. POTENZA |
| 1001 G STREET, N.W., SUITE 1100 |
| WASHINGTON, DC 20001-4597 |
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Assignment:
2
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RE-RECORD TO CORRECT AN ASSIGNOR ON REEL 011544 FRAME 0129. ASSIGNOR HEREBY CONFIRMS THE ASSIGNMENT OF THE ENTIRE INTEREST.
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| 72, HORIKAWA-CHO, SAIWAI-KU, KAWASAKI-SHI |
| KANAGAWA-KEN, JAPAN |
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| BANNER & WITCOFF, LTD. |
| JOSEPH M. POTENZA |
| 1001 G STREET, N.W. |
| SUITE 1100 |
| WASHINGTON, D.C. 20001-4597 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, SHIBAURA 1-CHOME |
| MINATO-KU |
| TOKYO, JAPAN 105-0023 |
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| OBLON, ET AL. |
| 1940 DUKE STREET |
| ALEXANDRIA, VA 22314 |
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