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Patent Assignment Abstract of Title
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Total Assignments: 3
Patent #:
Issue Dt:
10/22/2002
Application #:
09874175
Filing Dt:
06/04/2001
Inventors:
Steven C. Avanzino, Pin-Chin Connie Wang, Minh Van Ngo
Title:
INTEGRATED CIRCUIT WITH DIELECTRIC DIFFUSION BARRIER LAYER FORMED BETWEEN INTERCONNECTS AND INTERLAYER DIELECTRIC LAYERS
Assignment: 1
Reel/Frame:
012175/0631Recorded: 06/04/2001Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
06/01/2001
Exec Dt:
05/31/2001
Exec Dt:
05/31/2001
Assignee:
P.O. BOX 3453
ONE AMD PLACE
SUNNYVALE, CALIFORNIA 94088
Correspondent:
THE LAW OFFICES OF MIKIO ISHIMARU
MIKIO ISHIMARU
1110 SUNNYVALE-SARATOGA RD.
SUITE A1
SUNNYVALE, CA 94087
Assignment: 2
Reel/Frame:
044771/0944Recorded: 01/30/2018Pages: 5
Conveyance:
SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
12/28/2017
Assignee:
2485 AUGUSTINE DRIVE
SANTA CLARA, CALIFORNIA 95054
Correspondent:
CHRISTOPHER J. RECKAMP
311 S. WACKER DRIVE
FAEGRE BAKER DANIELS LLP
CHICAGO, IL 60606
Assignment: 3
Reel/Frame:
055766/0345Recorded: 03/30/2021Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
12/28/2017
Assignee:
121 W. LONG LAKE ROAD
SUITE 300
BLOOMFIELD HILLS, MICHIGAN 48304
Correspondent:
FENG XU
1526 GILPIN AVENUE
WILMINGTON, DE 19806

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