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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
12/17/2002
Application #:
09395025
Filing Dt:
09/13/1999
Inventor:
RUSSELL B. SEGAL
Title:
METHOD AND SYSTEM FOR CIRCUIT DESIGN TOP LEVEL AND BLOCK OPTIMIZATION
Assignment: 1
Reel/Frame:
010256/0850Recorded: 09/13/1999Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
09/09/1999
Assignee:
700 EAST MIDDLEFIELD ROAD
MOUNTAIN VIEW, CALIFORNIA 94043
Correspondent:
WAGNER, MURABITO & HAO LLP
GLENN D. BARNES
TWO NORTH MARKET STREET, THIRD FLOOR
SAN JOSE, CA 95113
Assignment: 2
Reel/Frame:
011457/0321Recorded: 01/24/2001Pages: 228
Conveyance:
SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
11/28/2000
Assignee:
270 PARK AVENUE
NEW YORK, NEW YORK 10017
Correspondent:
FEDERAL RESEARCH CORPORATION
PIERO GUIDICE
400 SEVENTH ST., N.W.
SUITE 101
WASHINGTON, DC 20004

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