Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Total Assignments:
1
|
|
Patent #:
|
|
Issue Dt:
|
02/11/2003
|
Application #:
|
09895339
|
Filing Dt:
|
06/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/07/2002
| | | | |
|
Inventor:
|
Toshiyuki Sakamoto
|
|
Title:
|
SIGNAL DELAY TIME CALCULATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT AND COMPUTER PROGRAM PRODUCT FOR EXECUTING THE METHOD
|
|
|
Assignment:
1
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| 72 HORIKAWA-CHO, SAIWAI-KU |
| KAWASAKI-SHI, JAPAN |
|
|
|
|
| GRAY, CARY, WARE & FREIDENRICH, LLP |
| EDWARD B. WELLER |
| 1755 EMBARCADERO ROAD |
| PALO ALTO, CA 94303-3340 |
|
|
Search Results as of:
04/29/2024 09:58 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
