Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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06/03/2003
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Application #:
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09528719
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Filing Dt:
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03/20/2000
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Inventor:
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Satoshi Yamauchi
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Title:
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EXPOSING METHOD AND APPARATUS FOR SEMICONDUCTOR INTEGRATED CIRCUITS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1, KAMIKODANAKA, 4-CHOME NAKAHATARA-KU, KAWASAKI-SHI |
| KANAGAWA 211-8588, JAPAN |
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| STAAS & HALSEY LLP |
| ATTN: DEBORAH S. GLADSTEIN |
| 700 ELEVENTH STREET, N.W. |
| SUITE 500 |
| WASHINGTON, D.C. 20001 |
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Assignment:
2
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RE-RECORD TO CORRECT THE ADDRESS OF THE ASSIGNEE, PREVIOUSLY RECORDED AT REEL 010644 FRAME 0671. ASSIGNOR HEREBY CONFIRMS THE ASSIGNMENT OF THE ENTIRE INTEREST.
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| NAKAHARA-KU, KAWASAKI-SHI |
| 1-1, KAMIKODANAKA, 4-CHOME |
| KANAGAWA 211-8588, JAPAN |
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| STAAS & HALSEY LLP |
| DEBORAH S. GLADSTEIN |
| 700 ELEVENTH STREET, N.W., SUITE 500 |
| WASHINGTON, D.C. 20001 |
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