Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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09/02/2003
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Application #:
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09605543
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Filing Dt:
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06/29/2000
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Inventors:
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Narsing Vijayrao, Chi Keung Lee, Kumar Sudarshan
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Title:
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DUAL THRESHOLD VOLTAGE COMPLEMENTARY PASS-TRANSISTOR LOGIC IMPLEMENTATION OF A LOW-POWER, PARTITIONED MULTIPLIER
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Assignment:
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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P.O. BOX 58119 |
2200 MISSION COLLEGE BLVD. |
SANTA CLARA, CALIFORNIA 95052 |
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KENYON & KENYON |
JOHN C. ALTMILLER, ESQ. |
1500 K ST., N.W., SUITE 700 |
WASHINGTON, D.C. 20005 |
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