Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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01/06/2004
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Application #:
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10072997
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Filing Dt:
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02/12/2002
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Publication #:
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Pub Dt:
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10/31/2002
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Inventors:
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Hiroyuki Wada, Nobuhiko Umezu, Koichi Tatsuki
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Title:
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METHOD AND SYSTEM FOR EVALUATING POLSILICON, AND METHOD AND SYSTEM FOR FABRICATING THIN FILM TRANSISTOR
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-35 KITASHINAGAWA 6-CHOME |
| SHINAGAWA-KU, TOKYO, JAPAN 141-0 |
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| OBLON, SPIVAK, MCCLELLAND, MAIER ET AL. |
| GREGORY J. MAIER |
| FOURTH FLOOR |
| 1755 JEFFERSON DAVIS HIGHWAY |
| ARLINGTON, VIRGINIA 22202 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 50 AZA KAMIFUNAKI, O-AZA OGAWA, |
| HIGASHIURA-CHO, CHITA-GUN |
| AICHI-KEN, JAPAN 470-2102 |
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| DANIEL M. GURFINKEL |
| 120 SOUTH LASALLE STREET, SUITE 1400 |
| CHICAGO, IL 60603 |
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