Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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03/23/2004
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Application #:
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09749809
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Filing Dt:
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12/28/2000
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Publication #:
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Pub Dt:
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06/28/2001
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Inventor:
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Itaru Tamura
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Title:
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FAILURE-ANALYZING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD USING THE SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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72 HORIKAWA-CHO, SAIWAI-KU |
KAWASAKI-SHI, JAPAN |
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OBLON, SPIVAK, MCCLELLAND, MAIER ET AL. |
MARVIN J. SPIVAK, ATTORNEYS AT LAW |
FOURTH FLOOR |
1755 JEFFERSON DAVIS HIGHWAY |
ARLINGTON, VIRGINA 22202 |
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