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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
6764947
Issue Dt:
07/20/2004
Application #:
10366801
Filing Dt:
02/14/2003
Inventors:
Darin Chan, Douglas J. Bonser, Marina V. Plat, Marilyn I. Wright, Chih Yuh Yang et al
Title:
METHOD FOR REDUCING GATE LINE DEFORMATION AND REDUCING GATE LINE WIDTHS IN SEMICONDUCTOR DEVICES
Assignment: 1
Reel/Frame:
013785/0559Recorded: 02/14/2003Pages: 8
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
CHAN, DARIN
Exec Dt:
10/17/2002
BONSER, DOUGLAS J.
Exec Dt:
10/29/2002
PLAT, MARINA V.
Exec Dt:
10/17/2002
WRIGHT, MARILYN T.
Exec Dt:
10/28/2002
YANG, CHIH YUH
Exec Dt:
10/17/2002
YOU, LU
Exec Dt:
10/17/2002
BELL, SCOTT A.
Exec Dt:
10/17/2002
FISHER, PHILIP A.
Exec Dt:
12/20/2002
Assignee:
ADVANCED MICRO DEVICES, INC.
1160 KERN AVENUE
SUNNYVALE, CALIFORNIA 94086-3453
Correspondent:
FOLEY & LARDNER
RONALD COSLICK
2029 CENTURY PARK E.
LOS ANGELES, CA 90067-3000

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