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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
08/17/2004
Application #:
10672931
Filing Dt:
09/26/2003
Inventors:
Thierry Poiroux, Philippe Flatresse
Title:
PROCESS AND DEVICE FOR EVALUATING A CMOS LOGICAL CELL
Assignment: 1
Reel/Frame:
014897/0821Recorded: 01/15/2004Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
11/03/2003
Exec Dt:
11/03/2003
Assignees:
29, BOULEVARD ROMAIN ROLLAND
F-92102, MONTROUGE, FRANCE
31/33 RUE DE LA FEDERATION
75015 PARIS, FRANCE
Correspondent:
ALLEN, DYER, DOPPELT, ET AL.
CHRISTOPHER F. REGAN
255 S. ORANGE AVE.
P.O. BOX 3791
ORLANDO, FL 32802

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