Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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09/21/2004
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Application #:
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09796856
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Filing Dt:
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02/28/2001
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Publication #:
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Pub Dt:
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08/23/2001
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Inventors:
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Jonathan D. Reid, David Smith, Steven T. Mayer, Jon Henri, Sesha Varadarajan
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Title:
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ELECTROPLATING PROCESS FOR AVOIDING DEFECTS IN METAL FEATURES OF INTEGRATED CIRCUIT DEVICES
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 4000 N. FIRST STREET |
| SAN JOSE, CALIFORNIA 95134 |
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| SKJERVEN MORRILL MACPHERSON LLP |
| ROBERTA P. SAXON |
| 25 METRO DRIVE, SUITE 700 |
| SAN JOSE, CA 95110 |
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