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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
09/21/2004
Application #:
10316851
Filing Dt:
12/12/2002
Publication #:
Pub Dt:
12/25/2003
Inventor:
Yeh Jun Lin
Title:
FLOATING GATE MEMORY ARCHITECTURE WITH VOLTAGE STABLE CIRCUIT
Assignment: 1
Reel/Frame:
013572/0928Recorded: 12/12/2002Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
11/07/2002
Assignee:
NO. 4, CREATION RD., III
SCIENCE-BASED INDUSTRIAL PARK
HSINCHU, TAIWAN R.O.C.
Correspondent:
BACON & THOMAS, PLLC
EUGENE MAR
625 SLATERS LANE FOURTH FLOOR
ALEXANDRIA, VA 22314

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