Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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09/28/2004
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Application #:
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10101723
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Filing Dt:
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03/21/2002
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Publication #:
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Pub Dt:
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10/03/2002
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Inventor:
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Satoshi Katayama
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Title:
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METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT HAVING CAPACITOR AND SILICIDED AND NON-SILICIDED TRANSISTORS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-3, NAKASE, MIHAMA-KU |
| MAKUHARI TECHNO GARDEN B5 |
| CHIBA 26-8501, JAPAN |
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| OLIFF & BERRIDGE, PLC |
| JAMES A. OLIFF |
| P.O. BOX 19928 |
| ALEXANDRIA, VA 22320 |
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