Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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11/02/2004
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Application #:
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10285540
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Filing Dt:
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11/01/2002
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Publication #:
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Pub Dt:
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05/01/2003
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Inventor:
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Takashi Miida
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Title:
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SEMICONDUCTOR MEMORY HAVING STORAGE CELLS STORING MULTIPLE BITS AND A METHOD OF MANUFACTURING THE SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 17-6, SHIN-YOKOHAMA 3-CHOME |
| KOUHOKU-KU-KU, YOKOHAMA |
| KANAGAWA, JAPAN 222-8580 |
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| BIRCH, STEWART, KOLASCH & BIRCH, LLP |
| MICHAEL K. MUTTER |
| P.O. BOX 747 |
| FALLS CHURCH, VA 22040-0747 |
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Assignment:
2
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CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE'S ADDRESS PREVIOUSLY RECORDED ON REEL 013451, FRAME 0495. ASSIGNOR HEREBY CONFIRMS THE ASSIGNMENT OF THE ENTIRE INTEREST.
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| 17-6, SHIN-YOKOHAMA 3-CHOME, KOUHOKU-KU, YOKOHAMA |
| KANAGAWA, JAPAN 222-8580 |
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| BIRCH, STEWART, KOLASCH & BIRCH, LLP |
| MICHAEL K. MUTTER |
| P.O. BOX 747 |
| FALLS CHURCH, VA 22040-0747 |
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