Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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03/08/2005
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Application #:
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09771886
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Filing Dt:
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01/29/2001
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Publication #:
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Pub Dt:
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11/08/2001
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Inventors:
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Robert Reiner, Holger Sedlak
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Title:
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CLOCKED INTEGRATED SEMICONDUCTOR CIRCUIT AND METHOD FOR OPERATING SUCH A CIRCUIT
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Assignment:
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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ZT GG VM |
POSTFACH 22 16 34 |
MUNCHEN, GERMANY 80506 |
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LERNER AND GREENBERG |
RALPH E. LOCHER |
P.O. BOX 2480 |
HOLLYWOOD, FL 33022 |
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