Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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12/06/2005
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Application #:
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10079997
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Filing Dt:
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02/19/2002
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Publication #:
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Pub Dt:
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09/26/2002
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Inventors:
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Hideaki Maeda, Yoshiju Watanabe, Naoki Satoh, Yasuyuki Ito
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Title:
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SIGNAL PROCESSING TECHNIQUE FOR PREVENTING DELAY IN READ TIME FROM RETRY OPERATIONS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 6, KANDA SURUGADAI 4-CHOME, CHIYODA-KU |
| TOKYO, JAPAN |
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| TOWNSEND AND TOWNSEND AND CREW LLP |
| ROBERT C. COLWELL |
| TWO EMBARCADERO CENTER |
| 8TH FLOOR |
| SAN FRANCISCO, CA 94111-3834 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2880, KOZU |
| ODAWARA-SHI, KANEGAWA-KEN, JAPAN |
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| TOWNSEND AND TOWNSEND AND CREW LLP |
| ROBERT C. COLWELL |
| TWO EMBARCADERO CENTER, EIGHTH FLOOR |
| SAN FRANCISCO, CA 94111-3834 |
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