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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
02/28/2006
Application #:
10431147
Filing Dt:
05/06/2003
Publication #:
Pub Dt:
08/12/2004
Inventors:
Jared L. Zerbe, Vladimir M. Stojanovic, Mark A. Horowitz, Pak S. Chau
Title:
INPUT/OUTPUT CIRCUIT WITH ON-CHIP INDUCTOR TO REDUCE PARASITIC CAPACITANCE
Assignment: 1
Reel/Frame:
014053/0534Recorded: 05/07/2003Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
03/26/2003
Exec Dt:
03/31/2003
Exec Dt:
04/25/2003
Exec Dt:
05/06/2003
Assignee:
4440 EL CAMINO REAL
LOS ALTOS, CALIFORNIA 94022
Correspondent:
SHEMWELL GREGORY & COURTNEY LLP
CHARLES E. SHEMWELL
4880 STEVENS CREEK BLVD.
SUITE 201
SAN JOSE, CA 95129-1034

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