Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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05/23/2006
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Application #:
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10152851
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Filing Dt:
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05/23/2002
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Publication #:
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Pub Dt:
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12/05/2002
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Inventors:
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Hideyuki Asakawa, Yoshimasa Endou
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Title:
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PLL (PHASE-LOCKED LOOP) CIRCUIT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-1, SHIBA 5-CHOME MINATO-KU |
| TOKYO, JAPAN 108-8 |
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| DICKSTEIN SHAPIRO MORIN & OSHINSKY LLP |
| STEVEN I. WEISBURD |
| 1177 AVENENUE OF THE AMERICAS, 41ST FL. |
| ATTY.DK.: T3201.0004/OUSO |
| NEW YORK, NY 10036-2714 |
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